Safety — Overview

The role of Safety inside Theory

Safety asks a fundamental question: “What happens when things go wrong?” Inside Theory, the Safety domain explains how architectures, interfaces, and digital/analog functions detect, contain, and mitigate faults that could lead to hazardous behavior.

Safety is transversal: it applies to FIFO, CDC, PHYs, analog blocks, protocols, CPUs, and every subsystem that interacts with the real world.

Safety is not an add‑on. It is part of the architecture.

Architectural Foundations

These pages introduce the conceptual and methodological basis of functional safety:

• Safety Architecture as an Early Design Phase
• Safety in System Architecture
• ASIL, SEooC, and FIT Metrics in Functional Safety
• FMEDA Overview
• Functional Safe States and Fault Reaction Strategies
• Watchdog and Safe State Management
• Fault Collection and Control Unit (FCCU)
• Board‑Level Fault Signaling

These topics define how safety is planned, measured, and enforced across the system.

ATPG & DFT — Structural Diagnostics for Safety

Structural testability is a cornerstone of functional safety. ATPG and DFT techniques provide controllability, observability, and diagnostic coverage for detecting structural faults, validating logic integrity, and supporting FMEDA and FIT budgeting.

Cluster root

• ATPG and DFT — Architecture and Principles

Child pages

• Scan Chains Concepts and Safety Implications
• LBIST Architecture
• MBIST Architecture
• Fault Models
• Test Points and Observability
• Boundary Scan (JTAG / IEEE 1149.1)
• ATPG Pattern Generation
• DFT for Safety‑Critical Systems
• DFT and FIT Contribution

These pages explain how structural diagnostics support startup tests, periodic tests, and safety‑critical fault detection.

Safety in Digital Blocks

These topics describe how digital subsystems maintain deterministic behavior and detect faults in timing, data integrity, and control flow:

• Safety in FIFO
• Safety in CDC
• Safety in Line Coding
• Safety in CRC
• Safety in LFSR/PRBS
• Safety in Data Path & Buffers
• Safety in State Machines
• Safety in Reset
• Safety in Clocking
• Safety in Protocol Layers

Safety in I/O and Interfaces

The boundary between silicon and the physical world is where most hazards originate. This cluster covers both the I/O domain and the PHY interfaces.

Parent page

• Safety in I/O
  (introductory page — contains Digital I/O and Analog I/O)

Child pages

• Safety in Digital I/O
  Stuck‑high, stuck‑low, open‑circuit, short‑to‑ground, short‑to‑battery, and diagnostic strategies for digital pins.
• Safety in Analog I/O
  Sensor open/short, drift, ADC saturation, reference mismatch, and plausibility checks.
• Safety in PHY Interfaces

Safety in Processing and Mixed‑Signal Blocks

These topics explain how processing units and mixed‑signal components detect internal faults and maintain safe operation:

• Safety in CPU / Lockstep
• TMR — Architecture & Fault Masking
• Common‑Cause Faults
• Delayed Lockstep
• Voter Architectures
• Safety in Power Management
• Safety in Analog Blocks
  Analog front‑ends, amplifiers, filters, comparators, ADC/DAC interfaces, biasing networks, and reference circuits. Covers drift, saturation, reference instability, noise, and analog plausibility diagnostics.

What comes next

As the Safety domain expands, each entry will link to a dedicated page covering:

• failure modes
• diagnostic mechanisms
• architectural patterns
• safe‑state behavior
• timing and reaction constraints
• interactions with Security

Safety grows with the Lab — and this overview remains the anchor point for understanding the whole structure.