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Line Coding — Overview & Families

Overview

This page introduces the main line‑coding families, their evolution, and the techniques used in modern high‑speed serial links.

Line coding refers to the set of techniques used to represent digital information on a physical transmission medium. It defines how bits are mapped to electrical or optical waveforms, ensuring reliable communication, clock recovery, DC balance, and spectral efficiency.

Modern high‑speed serial links rely on sophisticated block‑coding schemes and scrambling, while earlier systems used simpler transition‑based or multilevel signaling. Understanding line coding is essential for designing SerDes links, communication protocols, and physical‑layer architectures.

This page provides a structured overview of the main families of line coding, their evolution, and the techniques most relevant in today’s high‑speed systems.

Why Line Coding Exists

Digital links must satisfy several physical‑layer constraints:

  • Maintain sufficient transition density for clock recovery
  • Avoid DC offsets that saturate transformers or AC‑coupled channels
  • Control spectral content to reduce EMI and meet channel requirements
  • Provide error detection or support higher‑layer FEC
  • Enable block alignment and lane synchronization
  • Support high data rates with minimal overhead

Different line coding families address these constraints in different ways.

Historical Evolution of Line Coding

Line coding evolved through three major phases:

  1. Transition‑based signaling
    Simple schemes like NRZ, Manchester, and AMI used transitions to encode bits.
    Easy to implement, but limited in bandwidth efficiency.
  2. Multilevel and RLL techniques
    Used in storage and early serial links to reduce bandwidth and control run lengths.
    Examples include MLT‑3 and RLL (d,k) codes.
  3. Modern block‑coding and scrambling
    Designed for multi‑gigabit serial links.
    Provide low overhead, excellent spectral properties, and robust alignment.
    Examples: 8b/10b, 64b/66b, 128b/130b.

The modern era is dominated by block coding + scrambling + PAM4 modulation.

Families of Line Coding

1. Transition‑Based Signaling

These schemes encode information through transitions rather than absolute levels.

  • NRZ (Non‑Return‑to‑Zero) — simplest binary signaling
  • NRZI (Non‑Return‑to‑Zero Inverted) — transition on “1”
  • Manchester — mid‑bit transition for clock recovery
  • Differential Manchester — transition‑based differential encoding
  • AMI (Alternate Mark Inversion) — bipolar signaling with zero DC

These techniques are foundational and appear in many legacy systems.

2. Multilevel Signaling

Uses more than two voltage levels to reduce bandwidth or EMI.

  • MLT‑3 — three‑level signaling used in Fast Ethernet
  • PAM2 (NRZ) — two‑level signaling used in many serial links
  • PAM4 — four‑level signaling used in PCIe, 100G Ethernet, USB4
  • PAM8 — used in some experimental or proprietary systems

Multilevel signaling is essential in modern high‑speed copper links.

3. Run‑Length Limited (RLL) Codes

Control the maximum number of consecutive identical bits.

  • RLL (d,k) codes
  • MFM (Modified Frequency Modulation)
  • EFM (Eight‑to‑Fourteen Modulation)

Used mainly in magnetic and optical storage.

4. Block Coding

Maps groups of bits into larger blocks with controlled properties.

  • 4b/5b — used in early Fast Ethernet
  • 8b/10b — 25% overhead, excellent disparity control
  • 64b/66b — 3.125% overhead, uses scrambling
  • 128b/130b — 1.54% overhead, used in PCIe/USB4
  • 256b/257b — used in some OTN variants

Block coding is the backbone of modern serial communication.

5. Scrambling

Scrambling randomizes the bitstream to improve spectral properties.

  • Self‑synchronous scrambling
  • Synchronous scrambling

Used in 64b/66b, 128b/130b, SATA, PCIe, USB, and many other protocols.

Modern Line Coding Used Today

The techniques most relevant for high‑speed serial links (10G–128G) are:

  • 8b/10b Encoder / Decoder
  • 64b/66b Encoder / Decoder
  • 128b/130b Encoder / Decoder
  • PAM4 signaling
  • Self‑synchronous scrambling

These are the core pages of the domain.

Comparison Table

TechniqueOverheadClock RecoveryDC BalanceUsed In
NRZ0%PoorNoLegacy serial links
Manchester100%ExcellentYes10BASE-T, RFID
Differential Manchester (DME)100%ExcellentYes10BASE-T1s
MLT-30%ModerateYes100BASE-TX
8b/10b25%GoodYesPCIe Gen1/2, SATA, Fibre Channel
64b/66b3.125%GoodYes (scrambled)10G Ethernet, OTN
128b/130b1.54%GoodYes (scrambled)PCIe Gen3+, USB4, Thunderbolt
PAM40%Depends on codingNo100G Ethernet, PCIe Gen6

Related Content

These topics represent the conceptual foundations of line coding and the families of techniques used across different generations of communication systems.

  • Transition‑based signaling (NRZ, NRZI, Manchester)
  • Multilevel signaling (MLT‑3, PAM2, PAM4)
  • Run‑length limited codes (RLL, MFM, EFM)
  • Block coding (4b/5b, 8b/10b, 64b/66b, 128b/130b)
  • Scrambling techniques
  • Framing and alignment mechanisms (comma detection, sync headers, alignment markers)
  • Clock recovery and transition density
  • DC balance and spectral shaping

Related Pages

These pages provide detailed descriptions of the modern line coding techniques used in high‑speed serial communication systems.

Summary

  • Line coding defines how digital bits are represented on a physical medium.
  • Early systems used transition‑based schemes like NRZ and Manchester.
  • Multilevel signaling (MLT‑3, PAM4) reduces bandwidth or increases throughput.
  • Block coding (8b/10b, 64b/66b, 128b/130b) dominates modern high‑speed links.
  • Scrambling ensures DC balance and spectral whitening.
  • The most relevant techniques today are 64b/66b, 128b/130b, PAM4, and scrambling.
  • This page provides the conceptual map for the entire Line Coding domain.

Together, these techniques form the foundation of the Line Coding domain and prepare the ground for the detailed pages that follow.