PHY Interfaces — Line Coding and Modulation
Introduction
Line coding and modulation define how digital bits are transformed into symbols and waveforms suitable for transmission across a physical channel. These techniques ensure sufficient transition density, DC balance, spectral shaping, and robustness against noise and channel impairments.
Modern PHYs rely on a combination of:
- line coding (mapping bits to structured symbols)
- scrambling (whitening the data stream)
- modulation (mapping symbols to voltage or current levels)
- equalization (compensating for channel loss)
This page introduces the fundamental coding and modulation schemes used in high‑speed serial interfaces.
Role of Line Coding
Line coding ensures that the transmitted bitstream has properties required for reliable clock recovery and signal integrity.
Typical objectives include:
- transition density for CDR
- DC balance to avoid baseline wander
- bounded run lengths
- error detection (in some codes)
- symbol framing
- spectral shaping
Different PHYs choose different coding schemes depending on speed, complexity, and channel characteristics.
Common Line Coding Schemes
NRZ (Non‑Return‑to‑Zero)
- The simplest binary signaling scheme
- Used in many legacy and low‑speed interfaces
- Limited spectral shaping and no inherent DC balance
NRZI (Non‑Return‑to‑Zero Inverted)
- Encodes transitions instead of levels
- Used in USB 1.x/2.0 and some legacy protocols
- Reduces long runs of identical bits
Manchester Coding
- Each bit contains a guaranteed transition
- Excellent for clock recovery
- Doubles the required bandwidth
- Used in 10BASE‑T and some automotive protocols
8b/10b Coding
- Maps 8‑bit data into 10‑bit symbols
- Provides DC balance, bounded disparity, and transition density
- Used in PCIe (Gen1/2), SATA, USB 3.0, DisplayPort 1.x
64b/66b Coding
- Much lower overhead than 8b/10b
- Adds a 2‑bit sync header to 64 bits of data
- Used in 10G/25G Ethernet, PCIe Gen3, USB 3.1
128b/130b Coding
- Further reduces overhead
- Used in PCIe Gen4/5, USB4, Thunderbolt 3/4
Scrambling
- Used in many modern PHYs
- Randomizes data to avoid spectral peaks
- Ensures transition density without fixed symbol overhead
- Used in SATA, PCIe Gen3+, USB3.x, DisplayPort
Modulation Schemes
Modulation maps coded symbols to physical voltage or current levels.
PAM‑2 (NRZ Signaling)
- Two levels (0 and 1)
- Used in most traditional SerDes links
PAM‑4
- Four amplitude levels
- Doubles the bits per symbol
- Used in 25G/50G/100G Ethernet, PCIe 6.0
- Requires tighter noise margins and advanced equalization
Multi‑Carrier Modulation (OFDM)
- Used in Wi‑Fi, DSL, and some RF PHYs
- Splits the channel into many orthogonal subcarriers
- Robust against frequency‑selective fading
FSK / ASK / PSK
- Used in RF and low‑power PHYs
- Simple demodulation
- Good for noisy or long‑range channels
Coding + Modulation in Real PHYs
Examples of combined schemes:
- PCIe Gen1/2 → 8b/10b + NRZ
- PCIe Gen3/4/5 → Scrambling + 128b/130b + NRZ
- PCIe Gen6 → PAM‑4 + FEC + scrambling
- Ethernet 10G/25G → 64b/66b + NRZ
- Ethernet 100G/400G → PAM‑4 + FEC
- USB 3.x / USB4 → Scrambling + 128b/132b + NRZ
- DisplayPort 2.x → PAM‑4 + FEC
Coding and modulation are always chosen together to balance:
- bandwidth
- power
- complexity
- channel characteristics
- error tolerance
Why Coding and Modulation Matter
These techniques directly impact:
- signal integrity
- jitter tolerance
- CDR performance
- EMI/EMC behavior
- channel reach
- error rates
- power consumption
They are fundamental to the design of any high‑speed PHY.
